Designing reliable and efficient networks on chips
Auteur :
Murali, Srinivasan
Éditeur :
Springer-Verlag New York Inc.
ISBN :
9781402097560
Date de publication :
21 avr. 2009
Dimensions :
23,5 x 15,5 cm
Langue :
Anglais
Pays d'origine :
USA
Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge.