Design of cost-efficient interconnect processing units: spidergon stnoc
Auteur :
Coppola, Marcello / Grammatikakis, Miltos D. / Locatelli, Riccardo / Maruccia, Giuseppe / Pieralisi, Lorenzo
Éditeur :
Taylor & Francis Inc
ISBN :
9781420044713
Date de publication :
17 sept. 2008
Dimensions :
23,4 x 15,6 cm
Poids :
657 g
Langue :
Anglais
Pays d'origine :
USA
Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design.